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GENERATION OF PRECEDENCE HYPERGRAPHS FOR ASSEMBLY SYSTEM DESIGN
J.M. Henrioud, L. Relange, C. Perrard
Laboratoire d’Automatique de Besançon (UMR CNRS 6596)
Institut de Productique
25, rue Alain Savary
25000 BESANCON
Tel : +33 (0)3 8140-2803
Fax : +33 (0)3 8140-2809
Email : henrioud@ens2m.fr
In this paper, the authors propose an original method for the determination of precedence graphs for Assembly Line Design. This method is based on the transforamation of a set of assembly sequences into an hypergraph including “and” and “or” precedence relations between assembly tasks.
The resulting hypergraph may be transformed into a set of ordinary precedencen graphs. It is also possible to develop Assembly Line Balancing algorithms directly from the proposed hypergraph.
Keywords: Algorithms, Assembly, Computer-aided system design, Planning, Production
Session slot T-Th-A20: Assembly line Design and Balancing/Area code 1a : Advanced Manufacturing Technology
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