In this paper a method for testing the implementation of embedded control systems using a hardware-in-the-loop simulator (HILS) and a temporal logic tester is proposed. The goal of the simulator is to replicate a given dynamical process, to be able to generate faults and to automatically analyze the Embedded Control System (ECS) response against a temporal logic specification. The paper explains and demonstrates this technique by using a simple example. The HIL simulation is implemented on an Oberon platform, the controller used for the example is implemented on the Java real-time platform JBed.